Processors have many tunable parameters that can be set either at manufacturing, at system boot time, such as by the Basic Input-Output System (BIOS), or at runtime such as by the operating system (OS). Some of these tunable parameters include: (1) Hardware (HW) prefetcher settings, including turning on or off some HW prefetchers; (2) Software (SW) prefetch instruction settings, including ignoring or honoring SW prefetch instructions; (3) Cache evict/replacement hints, including ignoring or honoring cache evict/replacement hints; (4) Cache sizes, including dynamically configuring the cache sizes; (5) Dynamic Random-Access Memory (DRAM) channels, including configuring DRAM page opening policies and buffer sizes; and (6) HW buffer size, including configuring various HW buffer sizes or HW structure sizes.
Such parameters are generally set permanently (e.g., in BIOS) to be compatible with a wide variety of applications. As such, these settings may not be optimal for a given application. For instance, a given prefetcher setting may be beneficial to application A, whereas the same setting may reduce the performance of application B. In addition, because the prefetcher setting is fixed for a wide variety of applications, this setting is not tuned for optimizing the execution of application B.
Tunable parameters can be even coarser grain—for instance, in a heterogeneous-core processor, cores with different capabilities are present (e.g., Atom and Xeon cores). Here, instead of picking a prefetcher setting, an entire core is picked to run a piece of code. An Atom core could be adequate for running one piece of code, whereas another piece of code can truly benefit from a Xeon core.